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Disambiguation of "Krishnamurthy, Ram"

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A process variation compensating technique with an on-die leakage current sensor for nanometer scale dynamic circuits.

, , , , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (6): 646-649 (2006)

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Mahalakshmi Krishnamurthy

Adarsh Krishnamurthy

Arvind Krishnamurthy

Ram Gopal

Johann Ram

 

Other publications of authors with the same name

ECMDB: The E. coli Metabolome Database., , , , , , , , , and . Nucleic Acids Res., 41 (Database-Issue): 625-630 (2013)A process variation compensating technique with an on-die leakage current sensor for nanometer scale dynamic circuits., , , , and . IEEE Trans. Very Large Scale Integr. Syst., 14 (6): 646-649 (2006)Near Threshold Voltage (NTV) Computing: Computing in the Dark Silicon Era., , and . IEEE Des. Test, 34 (2): 24-30 (2017)Dynamic addressing memory arrays with physical locality., , , , and . MICRO, page 161-170. ACM/IEEE Computer Society, (2002)Algorithm and hardware design of discrete-time spiking neural networks based on back propagation with binary activations., , , , , , and . BioCAS, page 1-5. IEEE, (2017)Ultra-low energy circuit building blocks for security technologies., , , and . DATE, page 391-394. IEEE, (2018)A 4Gbps 0.57pJ/bit Process-Voltage-Temperature Variation Tolerant All-Digital True Random Number Generator in 45nm CMOS., , , and . VLSI Design, page 301-306. IEEE Computer Society, (2009)Evaluating and Enhancing Intel® Stratix® 10 FPGAs for Persistent Real-Time AI., , , , , , , , , and 6 other author(s). FPGA, page 119. ACM, (2019)A 230mV-950mV 2.8Tbps/W Unified SHA256/SM3 Secure Hashing Hardware Accelerator in 14nm Tri-Gate CMOS., , , , , , , and . ESSCIRC, page 98-101. IEEE, (2018)μRNG: A 300-950mV 323Gbps/W all-digital full-entropy true random number generator in 14nm FinFET CMOS., , , , , , , , , and 1 other author(s). ESSCIRC, page 116-119. IEEE, (2015)