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Disambiguation of "Merolla, Paul"

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Structured Convolution Matrices for Energy-efficient Deep learning.

, , , , , , , , and . CoRR, (2016)

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Jürgen Pauluhn

Andreas Pauldrach

Wolfgang Paulus

Dietmar Pauls

Günter Pauli

 

Other publications of authors with the same name

Building block of a programmable neuromorphic substrate: A digital neurosynaptic core., , , , , , , , , and 2 other author(s). IJCNN, page 1-8. IEEE, (2012)Gibbs sampling with low-power spiking digital neurons., , , , , , , , and . ISCAS, page 2704-2707. IEEE, (2015)The thermodynamic temperature of a rhythmic spiking network, , and . CoRR, (2010)A Multicast Tree Router for Multichip Neuromorphic Systems., , , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 61-I (3): 820-833 (2014)A Digital Neurosynaptic Core Using Event-Driven QDI Circuits., , , , , and . ASYNC, page 25-32. IEEE Computer Society, (2012)A Recurrent Model of Orientation Maps with Simple and Complex Cells., and . NIPS, page 995-1002. MIT Press, (2003)Dynamic computation in a recurrent network of heterogeneous silicon neurons., and . ISCAS, IEEE, (2006)TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip., , , , , , , , , and 8 other author(s). IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 34 (10): 1537-1557 (2015)Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations., , , , , , , , , and . Proc. IEEE, 102 (5): 699-716 (2014)Corrections to "Expandable Networks for Neuromorphic Chips"., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 54-I (4): 925-926 (2007)