( en | de | ru )

 

Disambiguation of "Asai, Hideki"

Author of the publication

copydeleteadd this publication to your clipboard
Equivalent circuit modeling of multilayered power/ground planes for fast transient simulation.

, and . DATE, page 1153-1158. IEEE Computer Society, (2010)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Kwaichiro Asai

Hideki Teshima

Hideki Mine

Yusuke Asai

Hideki Nakamura

 

Other publications of authors with the same name

Fast timing analysis of plane circuits via two-layer CNN-based modeling., , , , and . ISCAS, IEEE, (2006)Application of Relaxation-Based Technique to ADI-FDTD Method and Its Estimation., and . ISCAS, page 1489-1492. IEEE, (2007)Iterated Timing Analysis with Dynamic Partitioning Technique for Bipolar Transistor Circuits., , , and . ISCAS, page 411-414. IEEE, (1994)Application of neuro-based optimization algorithm to three dimensional cylindric puzzles., , , and . ICNN, page 1246-1250. IEEE, (1997)Generalized method of the time-domain circuit simulation based on LIM with MNA formulation., , , and . CICC, page 289-292. IEEE, (2005)A novel FDTD algorithm based on alternating-direction explicit method with PML absorbing boundary condition., , and . ASP-DAC, page 137-141. IEEE, (2010)New Criteria of Selective Orthogonal Matrix Least-Squares Method for Macromodeling Multiport Networks Characterized by Sampled Data., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 88-A (2): 524-532 (2005)Acceleration of ADI-FDTD Method by Gauss-Seidel Relaxation Approach., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 550-553 (2008)Behavioral modeling of EM devices by selective orthogonal matrix least-squares method., , , and . ASP-DAC, page 184-188. ACM, (2003)Network analysis by hierarchical tearing method., and . Syst. Comput. Jpn., 16 (6): 59-67 (1985)