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Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond., , , , , , , , , and 4 other author(s). IEICE Trans. Electron., 89-C (3): 250-262 (2006)Correction to "Voltage-Comparator-Based Measurement of Equivalentiy Samlpled Substrate Noise Wavefor., , , , and . IEEE J. Solid State Circuits, 31 (8): 1226 (1996)An NMOS Microcomputer Peripheral Interface Unit Incorporating an Analog-to-Digital Converter., , , , and . IEEE Trans. Computers, 29 (2): 102-107 (1980)Non-Quasi-Static Carrier Dynamics of MOSFETs under Low-Voltage Operation., , , , , , , , , and 1 other author(s). IEICE Trans. Electron., 92-C (5): 608-615 (2009)Substrate-noise and random-fluctuations reduction with self-adjusted forward body bias., , , , , , and . CICC, page 35-38. IEEE, (2005)Complex Bandpass DeltaSigmaAD Modulator Architecture without I, Q-Path Crossing Layout., , , , , , , , , and 5 other author(s). IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 89-A (4): 908-915 (2006)A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling., , , and . ASP-DAC, page 489-494. IEEE, (1998)Offset calibrating comparator array for 1.2-V, 6bit, 4-Gsample/s flash ADCs using 0.13μm generic CMOS technology., , , , and . ESSCIRC, page 711-714. IEEE, (2003)Substrate noise measurement by using noise-selective voltage comparators in analog and digital mixed-signal integrated circuits., , and . IEEE Trans. Instrumentation and Measurement, 48 (6): 1068-1072 (1999)Special Section on Analog Circuit Techniques and Related Topics.. IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 91-A (2): 441-442 (2008)