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A Scalable MIMO Detector Processor With Near-ASIC Energy Efficiency.

, , , and . IEEE Trans. Very Large Scale Integr. Syst., 23 (10): 1973-1986 (2015)

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Coarse-Grained Reconfigurable Array Architectures., , and . Handbook of Signal Processing Systems, Springer, (2013)Dimensioning for power and performance under 10nm: The limits of FinFETs scaling., , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Modeling FinFET metal gate stack resistance for 14nm node and beyond., , , , , , , , and . ICICDT, page 1-4. IEEE, (2015)Bias Temperature Instability analysis of FinFET based SRAM cells., , , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Resolving the memory bottleneck for single supply near-threshold computing., , , , , and . DATE, page 1-6. European Design and Automation Association, (2014)A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors., , , , , , and . ARCS, volume 4415 of Lecture Notes in Computer Science, page 57-68. Springer, (2007)Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals., , , , , , and . SAMOS, volume 4599 of Lecture Notes in Computer Science, page 322-332. Springer, (2007)Exploratory Power Noise Models of Standard Cell 14, 10, and 7 nm FinFET ICs., , , and . ACM Great Lakes Symposium on VLSI, page 233-238. ACM, (2016)Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes., , , , , , , , , and 5 other author(s). Microprocess. Microsystems, 39 (8): 1039-1051 (2015)An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors., , , , , , and . J. Signal Process. Syst., 61 (2): 157-179 (2010)