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Disambiguation of "Masuda, Yutaka"

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Performance Evaluation of Software-based Error Detection Mechanisms for Localizing Electrical Timing Failures under Dynamic Supply Noise.

, , and . ICCAD, page 315-322. IEEE, (2015)

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Yutaka Nojima

Yutaka Hayauchi

Yutaka Nomura

 

Other publications of authors with the same name

Neural Network Calculations at the Speed of Light Using Optical Vector-Matrix Multiplication and Optoelectronic Activation., , , , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 104-A (11): 1477-1487 (2021)Approximate Minimum Energy Point Tracking and Task Scheduling for Energy-Efficient Real-Time Computing., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 105-A (3): 518-529 (2022)Critical Path Isolation and Bit-Width Scaling Are Highly Compatible for Voltage Over-Scalable Design., , , , , and . DATE, page 1260-1265. IEEE, (2021)MTTF-Aware Design Methodology of Adaptively Voltage Scaled Circuit with Timing Error Predictive Flip-Flop., and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 102-A (7): 867-877 (2019)Performance Evaluation of Software-Based Error Detection Mechanisms for Supply Noise Induced Timing Errors., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 100-A (7): 1452-1463 (2017)Integration of Minimum Energy Point Tracking and Soft Real-Time Scheduling for Edge Computing., , , and . ISQED, page 300-306. IEEE, (2021)Comparing voltage adaptation performance between replica and in-situ timing monitors., , , , , and . ICCAD, page 39. ACM, (2018)A Standard Cell Memory Based on 2T Gain Cell DRAM for Memory-Centric Accelerator Design., , and . SOCC, page 1-6. IEEE, (2023)Hardware-simulation correlation of timing error detection performance of software-based error detection mechanisms., , and . IOLTS, page 84-89. IEEE, (2016)Activation-Aware Slack Assignment for Time-to-Failure Extension and Power Saving., , and . IEEE Trans. Very Large Scale Integr. Syst., 26 (11): 2217-2229 (2018)