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16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.

S. Devarajan, L. Singer, D. Kelly, S. Kosic, T. Pan, J. Silva, J. Brunsilius, D. Rey-Losada, F. Murden, C. Speir, J. Bray, E. Otte, N. Rakuljic, P. Brown, T. Weigandt, Q. Yu, D. Paterson, C. Petersen, and J. Gealow. ISSCC, page 288-289. IEEE, (2017)

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Celson José Silva

Alexandre José Silva

António José Silva

José Frederico Straggiotti Silva

Floriano José Silva Neto

Other publications of authors with the same name

Theory and applications of incremental ΔΣ converters.J. Márkus, J. Silva, and G. Temes. IEEE Trans. Circuits Syst. I Regul. Pap., 51-I (4): 678-690 (2004)A low-power 22-bit incremental ADC.V. Quiquempoix, P. Deval, A. Barreto, G. Bellini, J. Márkus, J. Silva, and G. Temes. IEEE J. Solid State Circuits, 41 (7): 1562-1571 (2006)Low-distortion delta-sigma topologies for MASH architectures.J. Silva, U. Moon, and G. Temes. ISCAS (1), page 1144-1147. IEEE, (2004)Design-oriented estimation of thermal noise in switched-capacitor circuits.R. Schreier, J. Silva, J. Steensgaard, and G. Temes. IEEE Trans. Circuits Syst. I Regul. Pap., 52-I (11): 2358-2368 (2005)A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offset.V. Quiquempoix, P. Deval, A. Barreto, G. Bellini, J. Collings, J. Márkus, J. Silva, and G. Temes. ESSCIRC, page 443-446. IEEE, (2005)Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.Y. Dong, J. Silva, Q. Meng, J. Zhao, W. Yang, T. Caldwell, H. Shibata, Z. Li, D. Paterson, and J. Gealow. CICC, page 1-4. IEEE, (2018)15.5 A 930mW 69dB-DR 465MHz-BW CT 1-2 MASH ADC in 28nm CMOS.Y. Dong, J. Zhao, W. Yang, T. Caldwell, H. Shibata, R. Schreier, Q. Meng, J. Silva, D. Paterson, and J. Gealow. ISSCC, page 278-279. IEEE, (2016)A -89-dBc IMD3 DAC Sub-System in a 465-MHz BW CT Delta-Sigma ADC Using a Power and Area Efficient Calibration Technique.J. Zhao, Y. Dong, W. Yang, H. Shibata, P. Shrestha, Z. Li, T. Caldwell, J. Silva, and J. Gealow. IEEE Trans. Circuits Syst. II Express Briefs, 65-II (7): 859-863 (2018)Adaptive digital noise-cancellation filtering using cross-correlators for continuous-time MASH ADC in 28nm CMOS.Y. Dong, J. Silva, Q. Meng, J. Zhao, W. Yang, T. Caldwell, H. Shibata, Z. Li, D. Paterson, and J. Gealow. CICC, page 1-4. IEEE, (2017)A 72 dB-DR 465 MHz-BW Continuous-Time 1-2 MASH ADC in 28 nm CMOS.Y. Dong, J. Zhao, W. Yang, T. Caldwell, H. Shibata, Z. Li, R. Schreier, Q. Meng, J. Silva, D. Paterson and 1 other author(s). IEEE J. Solid State Circuits, 51 (12): 2917-2927 (2016)

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Disambiguation of "Silva, José B."

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16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.

Please choose a person to relate this publication to

Celson José Silva

Alexandre José Silva

António José Silva

José Frederico Straggiotti Silva

Floriano José Silva Neto

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "Silva, José B."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML 16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.

Please choose a person to relate this publication to

Celson José Silva

Alexandre José Silva

António José Silva

José Frederico Straggiotti Silva

Floriano José Silva Neto

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
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history of this post
URL
DOI
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16.7 A 12b 10GS/s interleaved pipeline ADC in 28nm CMOS technology.