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Automatic Pruning of Autotuning Parameter Space for OpenCL Applications.

, , and . RES4ANT@DATE, volume 1643 of CEUR Workshop Proceedings, page 38-42. CEUR-WS.org, (2016)

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An industrial design space exploration framework for supporting run-time resource management on multi-core systems., , , , , , and . DATE, page 196-201. IEEE Computer Society, (2010)Two-levels of adaptive buffer for virtual channel router in NoCs., , , , , and . VLSI-SoC, page 302-307. IEEE, (2011)Run-time optimization of a dynamically reconfigurable embedded system through performance prediction., , , , , , and . FPL, page 1-8. IEEE, (2013)Conclusions.. Multi-objective Design Space Exploration of Multiprocessor SoC Architectures, Springer, (2011)Voltage island management in near threshold manycore architectures to mitigate dark silicon., , , and . DATE, page 1-6. European Design and Automation Association, (2014)Dynamic configuration of application-specific implicit instructions for embedded pipelined processors., , and . SAC, page 1509-1516. ACM, (2008)An efficient design space exploration methodology for multiprocessor SoC architectures based on response surface methods., , and . ICSAMOS, page 150-157. IEEE, (2008)Floorplanning-aware design space exploration for application-specific hierarchical networks on-chip., , , , , , and . NoCArc@MICRO, page 31-36. ACM, (2011)Energy estimation and optimization of embedded VLIW processors based on instruction clustering., , , , , and . DAC, page 886-891. ACM, (2002)Floorplan-aware hierarchical NoC topology with GALS interfaces., , , , , , and . ISCAS, page 652-655. IEEE, (2012)