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Disambiguation of "Asai, Tetsuya"

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An image sensor/processor 3D stacked module featuring ThruChip interfaces.

, , , , , , , and . ASP-DAC, page 7-8. IEEE, (2017)

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Kwaichiro Asai

Tetsuya Takahashi

Yusuke Asai

Tetsuya Mizutani

Tetsuya Kawata

 

Other publications of authors with the same name

Array-Enhanced Stochastic Resonance in a Network of Noisy Neuromorphic Circuits., , and . ICONIP (1), volume 6443 of Lecture Notes in Computer Science, page 188-195. Springer, (2010)A 300 nW, 15 ppm°C, 20 ppm/V CMOS Voltage Reference Circuit Consisting of Subthreshold MOSFETs., , , and . IEEE J. Solid State Circuits, 44 (7): 2047-2054 (2009)A subthreshold MOS neuron circuit based on the Volterra system., , and . IEEE Trans. Neural Networks, 14 (5): 1308-1312 (2003)Threshold-Logic Devices Consisting of Subthreshold CMOS Circuits., , , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 92-A (2): 436-442 (2009)On Digital LSI Circuits Exploiting Collision-Based Fusion Gates., , , and . Int. J. Unconv. Comput., 4 (1): 45-59 (2008)Neuro-morphic Circuit Architectures Employing Temporal Noises and Device Fluctuations to Improve Signal-to-noise Ratio in a Single-electron Pulse-density Modulator., , and . Int. J. Unconv. Comput., 7 (1-2): 53-63 (2011)Sensorless Force Control for Injection Molding Machine Using Reaction Torque Observer Considering Torsion Phenomenon., , , , , , and . IEEE Trans. Ind. Electron., 56 (8): 2955-2960 (2009)A CMOS Reaction-diffusion Device Using Minority-Carrier Diffusion in Semiconductors., , , and . Int. J. Bifurc. Chaos, 17 (5): 1713-1719 (2007)Offset cancellation with subthreshold-operated feedback circuit for fully differential amplifiers., , , and . ICECS, page 140-143. IEEE, (2009)Silicon neuron design based on phase reduction analysis., , and . SCIS&ISIS, page 1059-1062. IEEE, (2012)