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Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design.

, , and . CSSP, 36 (9): 3585-3597 (2017)

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Design and implementation of a 0.8 V input, 84% duty cycle, variable frequency step-up converter., , , and . Microelectron. J., 42 (5): 648-660 (2011)Memristor-Based Nonvolatile Random Access Memory: Hybrid Architecture for Low Power Compact Memory Design., , , and . IEEE Access, (2013)Design of a double balanced square law CMOS up-conversion mixer with improved input isolation technique for high frequency applications., and . ICECS, page 1088-1091. IEEE, (2010)A novel 7 Gbps low-power CMOS ultra-wideband pulse generator., and . IET Circuits Devices Syst., 6 (6): 406-412 (2012)Proximal Policy Optimization-Based Reinforcement Learning Approach for DC-DC Boost Converter Control: A Comparative Evaluation Against Traditional Control Techniques., , and . CoRR, (2023)A 36.1 GHz Single Stage Low Noise Amplifier Using 0.13 µm CMOS Process., , , and . CSIE (3), page 480-483. IEEE Computer Society, (2009)Testing complementary pass-transistor logic circuits., , and . ISCAS (4), page 5-8. IEEE, (2001)A Stabilization Technique for Single-Ended and Differential Harmonic Oscillators., and . CSSP, 34 (11): 3409-3429 (2015)Design of a linearly increasing inrush current limit circuit for DC-DC boost regulators., , , , and . APCCAS, page 863-866. IEEE, (2010)Memristor-Based Low-Power High-Speed Nonvolatile Hybrid Memory Array Design., , and . CSSP, 36 (9): 3585-3597 (2017)