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Improvement and parallel implementation of canny edge detection algorithm based on GPU.

, , , and . ASICON, page 641-644. IEEE, (2011)

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Variational capacitance modeling using orthogonal polynomial method., , , , , and . ACM Great Lakes Symposium on VLSI, page 23-28. ACM, (2008)Improvement and parallel implementation of canny edge detection algorithm based on GPU., , , and . ASICON, page 641-644. IEEE, (2011)An Optimized Face Recognition for Edge Computing., , , and . ASICON, page 1-4. IEEE, (2019)Characterization of Heavy Ion Induced SET Features in 22-nm FD-SOI Testing Circuits., , , , , , and . IEEE Access, (2020)A Robust Tracking with Low-Dimensional Target-Specific Feature Extraction., , , and . IEICE Trans. Inf. Syst., 102-D (7): 1349-1361 (2019)Real-Time Image Inpainting using PatchMatch Based Two-Generator Adversarial Networks with Optimized Edge Loss Function., , , , and . ISCAS, page 3145-3149. IEEE, (2022)Simulation of SEU Response of Advanced 20 nm FDSOI SRAMs., , , , , , , and . ASICON, page 1-4. IEEE, (2021)IZIP: In-place zero overhead interconnect protection via PIP redundancy., , , , and . ASICON, page 565-568. IEEE, (2017)Efficient model reduction of interconnects via double gramians approximation., , , and . ASP-DAC, page 25-30. IEEE, (2010)SSTA Scheme for Multiple Input Switching Case Based on Stochastic Collocation Method., , and . IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 95-A (12): 2443-2450 (2012)