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Disambiguation of "Jalle, Javier"

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AHRB: A high-performance time-composable AMBA AHB bus.

, , , , , and . RTAS, page 225-236. IEEE Computer Society, (2014)

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Javier Manero

Javier Jáurequi

Javier Dreyer

Javier Papa

Javier Arpón

 

Other publications of authors with the same name

A Dual-Criticality Memory Controller (DCmc): Proposal and Evaluation of a Space Case Study., , , , , and . RTSS, page 207-217. IEEE Computer Society, (2014)Improving time predictability of shared hardware resources in real-time multicore systems : emphasis on the space domain.. Polytechnic University of Catalonia, Spain, (2016)Bus designs for time-probabilistic multicore processors., , , , and . DATE, page 1-6. European Design and Automation Association, (2014)Increasing confidence on measurement-based contention bounds for real-time round-robin buses., , , , , and . DAC, page 125:1-125:6. ACM, (2015)Computing Safe Contention Bounds for Multicore Resources with Round-Robin and FIFO Arbitration., , , , , and . IEEE Trans. Computers, 66 (4): 586-600 (2017)Resource usage templates and signatures for COTS multicore processors., , , , , and . DAC, page 155:1-155:6. ACM, (2015)Contention-aware performance monitoring counte support for real-time MPSoCs., , , , , , , and . SIES, page 262-271. IEEE, (2016)Deconstructing bus access control policies for Real-Time multicores., , , , , and . SIES, page 31-38. IEEE, (2013)Data Bus Slicing for Contention-Free Multicore Real-Time Memory Systems., , , , , and . SIES, page 272-279. IEEE, (2016)Improving Early Design Stage Timing Modeling in Multicore Based Real-Time Systems., , , , and . RTAS, page 305-316. IEEE Computer Society, (2016)