( en | de | ru )

 

Disambiguation of "Pedram, Massoud"

Author of the publication

copydeleteadd this publication to your clipboard
Low-leakage SRAM Design with Dual V_t Transistors.

, , and . ISQED, page 729-734. IEEE Computer Society, (2006)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Pedram Derakhshani

Pedram Emami

Pedram Yazdanbakhsh

Pedram Azad

Pedram Hovareshti

 

Other publications of authors with the same name

Low power DCVSL circuits employing AC power supply., , and . Sci. China Ser. F Inf. Sci., 45 (3): 232-240 (2002)A Theoretical Framework for Quality Estimation and Optimization of DSP Applications Using Low-Power Approximate Adders., , , and . IEEE Trans. Circuits Syst. I Regul. Pap., 66-I (1): 327-340 (2019)Design Exploration of Energy-Efficient Accuracy-Configurable Dadda Multipliers With Improved Lifetime Based on Voltage Overscaling., , , and . IEEE Trans. Very Large Scale Integr. Syst., 28 (5): 1207-1220 (2020)Frame-Based Dynamic Voltage and Frequency Scaling for an MPEG Player., , and . J. Low Power Electron., 1 (1): 27-43 (2005)Coarse2Fine: A Two-stage Training Method for Fine-grained Visual Classification., , , and . CoRR, (2019)An efficient network on-chip architecture based on isolating local and non-local communications., , , and . DATE, page 350-353. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Optimal control of a grid-connected hybrid electrical energy storage system for homes., , , , and . DATE, page 881-886. EDA Consortium San Jose, CA, USA / ACM DL, (2013)Single-Bit Pseudoparallel Processing Low-Oversampling Delta-Sigma Modulator Suitable for SDR Wireless Transmitters., , , and . IEEE Trans. Very Large Scale Integr. Syst., 22 (4): 922-931 (2014)Theoretical bounds for switching activity analysis in finite-state machines., , and . IEEE Trans. Very Large Scale Integr. Syst., 8 (3): 335-339 (2000)BZ-FAD: A Low-Power Low-Area Multiplier Based on Shift-and-Add Architecture., , and . IEEE Trans. Very Large Scale Integr. Syst., 17 (2): 302-306 (2009)