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Disambiguation of "Cakir, Cagla"

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DELPHI: a framework for RTL-based architecture design evaluation using DSENT models.

, , , , , , , and . ISPASS, page 11-20. IEEE Computer Society, (2015)

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Cagla Cavusoglu

Sevinc Caglar

Safak Caglayan

Bertan Deniz Cakir

Ahmet Çakir

 

Other publications of authors with the same name

A 32kB secure cache memory with dynamic replacement mapping in 65nm bulk CMOS., , , , , and . A-SSCC, page 1-4. IEEE, (2015)Modeling and Design of High-Radix On-Chip Crossbar Switches., , , and . NOCS, page 20:1-20:8. ACM, (2015)A 4GHz 16nm SRAM Architecture with Low-Power Features for Heterogeneous Computing Platforms., , , , , , , and . VLSI Circuits, page 112-. IEEE, (2019)An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion., , , and . DSD, page 309-315. IEEE Computer Society, (2011)High-efficiency crossbar switches using capacitively coupled signaling., , , and . ISLPED, page 98-103. IEEE, (2015)Comparison of bi-stable and delay-based Physical Unclonable Functions from measurements in 65nm bulk CMOS., , and . CICC, page 1-4. IEEE, (2012)6T SRAM and 3T DRAM data retention and remanence characterization in 65nm bulk CMOS., , and . CICC, page 1-4. IEEE, (2012)Attack Resistant Sense Amplifier based PUFs (SA-PUF) with Deterministic and Controllable Reliability of PUF Responses., , and . HOST, page 106-111. IEEE Computer Society, (2010)Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS., , and . HOST, page 25-30. IEEE Computer Society, (2012)Scalable High-Radix Modular Crossbar Switches., , , and . Hot Interconnects, page 37-44. IEEE Computer Society, (2016)