BibSonomy publications for /author/Ignatowski http://www.bibsonomy.org/author/Ignatowski BibSonomy RSS Feed for /author/Ignatowski Technology, CAD tools, and designs for emerging 3D integration technology. dblp http://www.bibsonomy.org/bibtex/20fd37e22628b692ec0d2591030bc08c8/dblp dblp 2008-05-13T00:00:00+02:00 dblp
Technology, CAD tools, and designs for emerging 3D integration technology.
Syed M. Alam and Mike Ignatowski and Yuan Xie ACM Great Lakes Symposium on VLSI 1-2 (2008)
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]]> Interconnects in the Third Dimension: Design Challenges for 3D ICs. dblp http://www.bibsonomy.org/bibtex/253cc46968225b59fcba10a2fa399b9a5/dblp dblp 2008-02-28T00:00:00+01:00 dblp
Interconnects in the Third Dimension: Design Challenges for 3D ICs.
Kerry Bernstein and Paul Andry and Jerome Cann and Philip G. Emma and David Greenberg and Wilfried Haensch and Mike Ignatowski and Steve Koester and John Magerlein and Ruchir Puri and Albert M. Young DAC 562-567 (2007)
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]]> A hierarchical gate array architecture and design methodology. dblp http://www.bibsonomy.org/bibtex/2c4584ad883a6ff524b8d89613ee66516/dblp dblp 2007-01-22T00:00:00+01:00 dblp
A hierarchical gate array architecture and design methodology.
M. Iachponi and D. Vail and S. Bierly and A. Ignatowski DAC 439-442 (1985)
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]]> Exploitation of optical interconnects in future server architectures. dblp http://www.bibsonomy.org/bibtex/2bd0e5b7e1a3c8c564b7df62253a3551f/dblp dblp 2006-09-05T00:00:00+02:00 dblp
Exploitation of optical interconnects in future server architectures.
Alan F. Benner and Michael Ignatowski and Jeffrey A. Kash and Daniel M. Kuchta and Mark B. Ritter IBM Journal of Research and Development 49 755-776 (2005)
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]]> Analytical analysis of finite cache penalty and cycles per instruction of a multiprocessor memory hierarchy using miss rates and queuing theory. dblp http://www.bibsonomy.org/bibtex/2cfec61ba7e6ff2ba7d0628a88aba9c84/dblp dblp 2003-05-16T00:00:00+02:00 dblp
Analytical analysis of finite cache penalty and cycles per instruction of a multiprocessor memory hierarchy using miss rates and queuing theory.
Richard E. Matick and Thomas J. Heller and Michael Ignatowski IBM Journal of Research and Development 45 819-842 (2001)
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