BibSonomy publications for /author/Kammler http://www.bibsonomy.org/author/Kammler BibSonomy RSS Feed for /author/Kammler Identification of Reflected, Scaled, Translated, and Rotated Objects From Their Radon Projections. dblp http://www.bibsonomy.org/bibtex/25c7fa51b13ae18d44c5795e92b6d3c6b/dblp dblp 2008-09-02T00:00:00+02:00 dblp
Identification of Reflected, Scaled, Translated, and Rotated Objects From Their Radon Projections.
Hjouj Hjouj and David W. Kammler IEEE Transactions on Image Processing 17 301-310 (2008)
to dblp by dblp on 2008-09-02 00:00:00
]]> Power-efficient Instruction Encoding Optimization for Various Architecture Classes. dblp http://www.bibsonomy.org/bibtex/29a80cc304f27b46424da374720aed659/dblp dblp 2008-08-12T00:00:00+02:00 dblp
Power-efficient Instruction Encoding Optimization for Various Architecture Classes.
Diandian Zhang and Anupam Chattopadhyay and David Kammler and Ernst Martin Witte and Gerd Ascheid and Rainer Leupers and Heinrich Meyr JCP 3 25-38 (2008)
to dblp by dblp on 2008-08-12 00:00:00
]]> Automatic ADL-based operand isolation for embedded processors. dblp http://www.bibsonomy.org/bibtex/240f401aaf335a793dd408fdef8578d75/dblp dblp 2008-08-05T00:00:00+02:00 dblp
Automatic ADL-based operand isolation for embedded processors.
Anupam Chattopadhyay and B. Geukes and David Kammler and Ernst Martin Witte and Oliver Schliebusch and Harold Ishebabi and Rainer Leupers and Gerd Ascheid and Heinrich Meyr DATE 600-605 (2006)
to dblp by dblp on 2008-08-05 00:00:00
]]> Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors. dblp http://www.bibsonomy.org/bibtex/24cc40d2231eb35c9bff9fb1cef6c95bd/dblp dblp 2008-08-05T00:00:00+02:00 dblp
Prefabrication and postfabrication architecture exploration for partially reconfigurable VLIW processors.
Anupam Chattopadhyay and Harold Ishebabi and X. Chen and Z. Rakosi and Kingshuk Karuri and David Kammler and Rainer Leupers and Gerd Ascheid and Heinrich Meyr ACM Trans. Embedded Comput. Syst. 7 (2008)
to dblp by dblp on 2008-08-05 00:00:00
]]> Sozialistische Betriebswirtschaft der Baukombinate und Baubetriebe imported http://www.bibsonomy.org/bibtex/2f81cca2a9d5128e23d343d3444a114de/fbw fbw 2008-05-30T16:42:01+02:00 imported
Sozialistische Betriebswirtschaft der Baukombinate und Baubetriebe
{Norbert} Kammler (1986)
to imported by fbw on 2008-05-30 16:42:01
]]> ASIP architecture exploration for efficient IPSec encryption: A case study ASIP architecture exploration for efficient IPSec encryption http://www.bibsonomy.org/bibtex/2f3e9661635af66d734b82058ba84cf21/derkling derkling 2008-01-07T16:14:12+01:00 ASIP Architecture-Exploration Efficient Encryption
ASIP architecture exploration for efficient IPSec encryption: A case study
Hanno Scharwaechter and David Kammler and Andreas Wieferink and Manuel Hohenauer and Kingshuk Karuri and Jianjiang Ceng and Rainer Leupers and Gerd Ascheid and Heinrich Meyr Trans. on Embedded Computing Sys. 6 12 (2007)
to ASIP Architecture-Exploration Efficient Encryption by derkling on 2008-01-07 16:14:12
]]> ASIP architecture exploration for efficient IPSec encryption: A case study. dblp http://www.bibsonomy.org/bibtex/2b3665e0a5f44e43f8234318d35651070/dblp dblp 2007-11-06T00:00:00+01:00 dblp
ASIP architecture exploration for efficient IPSec encryption: A case study.
Hanno Scharwächter and David Kammler and Andreas Wieferink and Manuel Hohenauer and Kingshuk Karuri and Jianjiang Ceng and Rainer Leupers and Gerd Ascheid and Heinrich Meyr ACM Trans. Embedded Comput. Syst. 6 (2007)
to dblp by dblp on 2007-11-06 00:00:00
]]> Design space exploration of partially re-configurable embedded processors. dblp http://www.bibsonomy.org/bibtex/202f7056c90540263555d730cab259df5/dblp dblp 2007-06-22T00:00:00+02:00 dblp
Design space exploration of partially re-configurable embedded processors.
Anupam Chattopadhyay and W. Ahmed and Kingshuk Karuri and David Kammler and Rainer Leupers and Gerd Ascheid and Heinrich Meyr DATE 319-324 (2007)
to dblp by dblp on 2007-06-22 00:00:00
]]> Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors. dblp http://www.bibsonomy.org/bibtex/27d2da1efab65e262b183f11879bc5e74/dblp dblp 2007-06-18T00:00:00+02:00 dblp
Pre- and Post-Fabrication Architecture Exploration for Partially Reconfigurable VLIW Processors.
Anupam Chattopadhyay and Z. Rakosi and Kingshuk Karuri and David Kammler and Rainer Leupers and Gerd Ascheid and Heinrich Meyr IEEE International Workshop on Rapid System Prototyping 189-194 (2007)
to dblp by dblp on 2007-06-18 00:00:00
]]> Power-efficient Instruction Encoding Optimization for Embedded Processors. dblp http://www.bibsonomy.org/bibtex/29adf4be878d30f3cc3821c5f3c4db275/dblp dblp 2007-03-27T00:00:00+02:00 dblp
Power-efficient Instruction Encoding Optimization for Embedded Processors.
Anupam Chattopadhyay and Diandian Zhang and David Kammler and Ernst Martin Witte VLSI Design 595-600 (2007)
to dblp by dblp on 2007-03-27 00:00:00
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