BibSonomy publications for /author/Spars%C3%B8 http://www.bibsonomy.org/author/Spars%C3%B8 BibSonomy RSS Feed for /author/Spars%C3%B8 Design of Self-timed Multipliers: A Comparison. dblp http://www.bibsonomy.org/bibtex/2a4dcddd7dd83c2044aab7c3159d7d0bd/dblp dblp 2008-07-17T00:00:00+02:00 dblp
Design of Self-timed Multipliers: A Comparison.
Jens Sparsø and Christian D. Nielsen and Lars Skovby Nielsen and Jørgen Staunstrup Asynchronous Design Methodologies 165-179 (1993)
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]]> A Low-Power Heterogeneous Multiprocessor Architecture for Audio Signal Processing. dblp http://www.bibsonomy.org/bibtex/2e551da65354b964136bf8d2993d0ec2d/dblp dblp 2008-07-17T00:00:00+02:00 dblp
A Low-Power Heterogeneous Multiprocessor Architecture for Audio Signal Processing.
Özgün Paker and Jens Sparsø and Niels Haandbæk and Mogens Isager and Lars Skovby Nielsen VLSI Signal Processing 37 95-110 (2004)
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]]> Low-power operation using self-timed circuits and adaptive scaling of the supply voltage. dblp http://www.bibsonomy.org/bibtex/2083b6ce324ccb93b4e2c25f30fff4a83/dblp dblp 2008-07-17T00:00:00+02:00 dblp
Low-power operation using self-timed circuits and adaptive scaling of the supply voltage.
Lars Skovby Nielsen and C. Niessen and Jens Sparsø and K. van Berkel IEEE Trans. VLSI Syst. 2 391-397 (1994)
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]]> ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology. dblp http://www.bibsonomy.org/bibtex/26712b949a0896f3629d64c5d395e8074/dblp dblp 2008-05-23T00:00:00+02:00 dblp
ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology.
Mikkel Bystrup Stensgaard and Jens Sparsø NOCS 55-64 (2008)
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]]> A Reactive and Cycle-True IP Emulator for MPSoC Exploration. dblp http://www.bibsonomy.org/bibtex/2b5f405fb5ed6eba87694c838dc9b2a87/dblp dblp 2008-04-08T00:00:00+02:00 dblp
A Reactive and Cycle-True IP Emulator for MPSoC Exploration.
Shankar Mahadevan and Federico Angiolini and Jens Sparsø and Luca Benini and Jan Madsen IEEE Trans. on CAD of Integrated Circuits and Systems 27 109-122 (2008)
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]]> A Traffic Injection Methodology with Support for System-Level Synchronization. dblp http://www.bibsonomy.org/bibtex/2e3f00e112b5115fd00a40b700f549d96/dblp dblp 2007-11-07T00:00:00+01:00 dblp
A Traffic Injection Methodology with Support for System-Level Synchronization.
Shankar Mahadevan and Federico Angiolini and Jens Sparsø and Luca Benini and Jan Madsen VLSI-SoC 145-161 (2005)
to dblp by dblp on 2007-11-07 00:00:00
]]> A Simple Clockless Network-on-Chip for a Commercial Audio DSP Chip. dblp http://www.bibsonomy.org/bibtex/24d6dbc1b3e820f1dd5218e5d91f873d9/dblp dblp 2007-06-22T00:00:00+02:00 dblp
A Simple Clockless Network-on-Chip for a Commercial Audio DSP Chip.
Mikkel Bystrup Stensgaard and Tobias Bjerregaard and Jens Sparsø and Johnny Halkjær Pedersen DSD 641-648 (2006)
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]]> A scalable, timing-safe, network-on-chip architecture with an integrated clock distribution method. dblp http://www.bibsonomy.org/bibtex/27ad748c4bc9e534d1981cf331f78bcae/dblp dblp 2007-06-22T00:00:00+02:00 dblp
A scalable, timing-safe, network-on-chip architecture with an integrated clock distribution method.
Tobias Bjerregaard and Mikkel Bystrup Stensgaard and Jens Sparsø DATE 648-653 (2007)
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]]> Packetizing OCP Transactions in the MANGO Network-on-Chip. dblp http://www.bibsonomy.org/bibtex/2b537b544442a446ae817c0d70dce85d8/dblp dblp 2007-01-12T00:00:00+01:00 dblp
Packetizing OCP Transactions in the MANGO Network-on-Chip.
Tobias Bjerregaard and Jens Sparsø DSD 657-664 (2006)
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]]> Future directions in clocking multi-ghz systems. dblp http://www.bibsonomy.org/bibtex/2c55e89322ff554684680515d563b93f6/dblp dblp 2006-02-15T00:00:00+01:00 dblp
Future directions in clocking multi-ghz systems.
Vojin G. Oklobdzija and Jens Sparsø ISLPED 219 (2002)
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