BibSonomy publications for /author/CristalTue Feb 07 00:00:00 CET 2012TACO431Hardware transactional memory with software-defined conflicts.82012dblp Thu Feb 02 00:00:00 CET 2012International Journal of Parallel Programming125-56Profiling and Optimizing Transactional Memory Applications.402012dblp Thu Jan 05 00:00:00 CET 2012PACTconf/IEEEpact/2011199-200SymptomTM: Symptom-Based Error Detection and Recovery Using Hardware Transactional Memory.2011dblp Thu Jan 05 00:00:00 CET 2012PACTconf/IEEEpact/2011361-371Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory.2011dblp Thu Jan 05 00:00:00 CET 2012PACTconf/IEEEpact/2011221-231STM2: A Parallel STM for High Performance Simultaneous Multithreading Systems.2011dblp Thu Jan 05 00:00:00 CET 2012PACTconf/IEEEpact/2011340-349DiDi: Mitigating the Performance Impact of TLB Shootdowns Using a Shared TLB Directory.2011dblp Wed Nov 23 00:00:00 CET 2011ICCDconf/iccd/2011431-432FIMSIM: A fault injection infrastructure for microarchitectural simulators.2011dblp Fri Nov 11 00:00:00 CET 2011ICGSEconf/icgse/2008222-226Usage of SCRUM Practices within a Global Company.2008dblp Fri Nov 11 00:00:00 CET 2011ICGSEconf/icgse/2006239-240Leveraging lessons learned for distributed projects through Communities of Practice.2006dblp Thu Nov 03 00:00:00 CET 2011IEEE Micro576-87The Velox Transactional Memory Stack.302010dblp Tue Oct 25 00:00:00 CEST 2011Computer Architecture LettersA Case for Resource-conscious Out-of-order Processors.22003dblp Thu Jul 07 00:00:00 CEST 2011Euro-Parconf/europar/20049-20Lecture Notes in Computer ScienceMaintaining Thousands of In-flight Instructions.31492004dblp Tue Jul 05 00:00:00 CEST 2011ISHPCconf/ishpc/200399-112Lecture Notes in Computer ScienceA Simple Low-Energy Instruction Wakeup Mechanism.28582003dblp Tue Jul 05 00:00:00 CEST 2011ISHPCconf/ishpc/200310-25Lecture Notes in Computer ScienceKilo-instruction Processors.28582003dblp Tue Jun 07 00:00:00 CEST 2011ICPEconf/wosp/2011335-346RMS-TM: a comprehensive benchmark suite for transactional memory systems.2011dblp Mon May 23 00:00:00 CEST 2011FCCMconf/fccm/2011146-153TMbox: A Flexible and Reconfigurable 16-Core Hybrid Transactional Memory System.2011dblp Fri May 20 00:00:00 CEST 2011International Journal of Parallel Programming3375-396Hybrid Transactional Memory with Pessimistic Concurrency Control.392011dblp Wed May 11 00:00:00 CEST 2011ACM Great Lakes Symposium on VLSIconf/glvlsi/2011325-330Circuit design of a dual-versioning L1 data cache for optimistic concurrency.2011dblp Tue Mar 22 00:00:00 CET 2011ARCconf/arc/2011350-362Lecture Notes in Computer ScienceFrom Plasma to BeeFarm: Design Experience of an FPGA-Based Multicore Prototype.65782011dblp Mon Feb 14 00:00:00 CET 2011PACTconf/IEEEpact/2010285-294Discovering and understanding performance bottlenecks in transactional applications.2010dblp