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• Automated hardware design using genetic programming, VHDL, and FPGAs
  Robert L. Popp and David J. Montana and Richard R. Gassner and Gordon Vidaver and Suraj Iyer IEEE International Conference on Systems, Man, and Cybernetics, 3, page2184--2189. San Diego, CA USA, IEEE, 11-14 October1998.
  to VHDL, design, logic, programming, software requirements, arrays, field design languages, description programmable hardware circuit FPGA, evolution, Description optimisation, configuration variants CAD, management, system algorithms, Hardware automated gate genetic Language, VHSIC by brazovayeye on Jun 19, 2008, 5:46 PM
  BibTeX 
• Digital Circuit Evolution and Fitness Landscapes
  Vesselin K. Vassilev and Julian F. Miller and Terence C. Fogarty Proceedings of the Congress on Evolutionary Computation, 2, Mayflower Hotel, Washington D.C., USA, IEEE Press, 6-9 July1999.
  to search, sequences, field-programmable arrays, problems, optimisation, gate evolution, idealised circuit digital alphabets, field circuits, problem, optimisation correlation programmable fitness functionality, connectivity, characteristics, cell genotype model, engineering combinatorial array, logic computation, representation, sequences evolutionary landscapes, by brazovayeye on Jun 19, 2008, 5:35 PM
  BibTeX 
• A hybridized genetic parallel programming based logic circuit synthesizer
  Wai Shing Lau and Kin Hong Lee and Kwong Sak Leung GECCO 2006: Proceedings of the 8th annual conference on Genetic and evolutionary computation, 1, page839--846. Seattle, Washington, USA, ACM Press, 8-12 July2006.
  to technology look genetic design array, programming programmable aids, synthesiser, gate field programming, table, a performance logic flowMap, up experimentation, circuit mapping hybridised and parallel algorithms, by brazovayeye and 1 other person on Jun 19, 2008, 5:35 PM
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• A methodology for reconfigurable hardware design based upon evolutionary computation
  Francisco Fernandez de Vega and J. I. Hidalgo and J. Lanchares and J. M. Sanchez Microprocessors and Microsystems28(7):363--371September2004.
  to Configurable gate logic algorithm, genetic programming, blocks hardware, Field reconfigurable Compact algorithms, arrays, programmable by brazovayeye on Jun 19, 2008, 5:35 PM
  URL | BibTeX