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Physical and Silicon Measures of Low Power Clock Gating Success: An Apple to Apple Case Study
Pokhrel Khem HPCA '05: Proceedings of the 11th International Symposium on High-Performance Computer Architecture, SNUG, (2007)
to Clock-Gating PhD_Background_Mechanisms PhD_Biblio by derkling on Aug 31, 2009, 3:56 PM
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Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors
Hans Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor Zyuban, Rick Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, and Joel Tendler HPCA '05: Proceedings of the 11th International Symposium on High-Performance Computer Architecture, page 238--242. Washington, DC, USA, IEEE Computer Society, (2005)
to Clock-Gating PhD_Background_Mechanisms PhD_Biblio by derkling and 1 other user on Aug 31, 2009, 3:54 PM
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Deterministic Clock Gating for Microprocessor Power Reduction
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykumar, and Kaushik Roy In Proc. of 9 th Int'l Symp. on High Performance Computer Architecture HPCA, page 113--122. (2003)
to Clock-Gating PhD_Background_Mechanisms PhD_Biblio by derkling and 1 other user on Aug 31, 2009, 3:46 PM
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