Abstract
Spectrum analysis is very essential requirement in instrumentation and communication signal interception .Spectrum analysis is normally carried out by online or offline FFT processing. But the FFT being highly mathematical intensive, is not suitable for low area and low power
applications. Offline FFT processing can’t give the real time spectrum estimation which is essential in communication signal interception. Online FFT computation takes very high
resources, which makes the system costly and power hungry. The Goertzel algorithm is a digital signal processing (DSP) technique for identifying frequency components of a signal,
published by Dr. Gerald Goertzel in 1958. While the general Fast Fourier transform (FFT) algorithm computes evenly across the bandwidth of the incoming signal, the Goertzel
algorithm looks at specific, predetermined frequency. However the implementation of Goertzel algorithm for spectrum computation is not explored for FPGA implementation. The
FPGA being capable of offering high frequency data paths in them become suitable for realizing high speed spectrum analysis algorithms. In this project Goertzel algorithm will be implemented as high Q band pass filter on FPGA reconfigurable architecture. VHDL will be used for code development. A digital frequency synthesizer produces frequency sweep which will drive the digital mixer. The digital mixer output is given to the Goerzel algorithm block. This algorithm output will be given to peak detection logic. The peak detector block output will be used for spectrum computation. The top level module integrates all these modules with appropriate clock and control circuitry. The results will be demonstrated by applying the deterministic signals such as SIN wave and also with random band limited
signals. It will be aimed to achieve 32 steps in the band of operation for spectrum computation on Spartan 3E low cost FPGA. Modelsim tool will be used for simulation. Xilinx ISE
will be used for synthesis and programming the FPGA. Xilinx Chipscope will be used on chip verification of results.
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