%0 Journal Article %1 journals/tvlsi/WangMPCD05 %A Wang, Hua %A Miranda, Miguel %A Papanikolaou, Antonis %A Catthoor, Francky %A Dehaene, Wim %D 2005 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 10 %P 1127-1135 %T Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi13.html#WangMPCD05 %V 13

@article{journals/tvlsi/WangMPCD05, added-at = {2020-03-11T00:00:00.000+0100}, author = {Wang, Hua and Miranda, Miguel and Papanikolaou, Antonis and Catthoor, Francky and Dehaene, Wim}, biburl = {https://www.bibsonomy.org/bibtex/21c32e995f05f6da365f0400afb0ba695/dblp}, ee = {https://www.wikidata.org/entity/Q58767830}, interhash = {1006f5388ea8ed6344a7d55e302126f0}, intrahash = {1c32e995f05f6da365f0400afb0ba695}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 10, pages = {1127-1135}, timestamp = {2020-03-12T11:43:56.000+0100}, title = {Variable tapered pareto buffer design and implementation allowing run-time configuration for low-power embedded SRAMs.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi13.html#WangMPCD05}, volume = 13, year = 2005 }