%0 Conference Paper %1 conf/isscc/ChenSLHL11 %A Chen, Ming-Shuan %A Shih, Yu-Nan %A Lin, Chen-Lun %A Hung, Hao-Wei %A Lee, Jri %B ISSCC %D 2011 %I IEEE %K dblp %P 146-148 %T A 40Gb/s TX and RX chip set in 65nm CMOS. %U http://dblp.uni-trier.de/db/conf/isscc/isscc2011.html#ChenSLHL11 %@ 978-1-61284-303-2

@inproceedings{conf/isscc/ChenSLHL11, added-at = {2011-09-30T00:00:00.000+0200}, author = {Chen, Ming-Shuan and Shih, Yu-Nan and Lin, Chen-Lun and Hung, Hao-Wei and Lee, Jri}, biburl = {https://www.bibsonomy.org/bibtex/24bc66dbae7a3c402e98723c403684ec5/dblp}, booktitle = {ISSCC}, crossref = {conf/isscc/2011}, ee = {http://dx.doi.org/10.1109/ISSCC.2011.5746257}, interhash = {02da66f2445eb170eb6be97a7b522a0a}, intrahash = {4bc66dbae7a3c402e98723c403684ec5}, isbn = {978-1-61284-303-2}, keywords = {dblp}, pages = {146-148}, publisher = {IEEE}, timestamp = {2011-10-01T11:38:22.000+0200}, title = {A 40Gb/s TX and RX chip set in 65nm CMOS.}, url = {http://dblp.uni-trier.de/db/conf/isscc/isscc2011.html#ChenSLHL11}, year = 2011 }