%0 Conference Paper %1 conf/csai/WangLG18 %A Wang, Zhenyu %A Luo, Xiangzhong %A Gong, Zheng %B CSAI/ICIMT %D 2018 %I ACM %K dblp %P 571-575 %T Application of Deep Learning in Analog Circuit Sizing. %U http://dblp.uni-trier.de/db/conf/csai/csai2018.html#WangLG18 %@ 978-1-4503-6606-9

@inproceedings{conf/csai/WangLG18, added-at = {2019-04-12T00:00:00.000+0200}, author = {Wang, Zhenyu and Luo, Xiangzhong and Gong, Zheng}, biburl = {https://www.bibsonomy.org/bibtex/2aba6feeadae50fae1b567c82eca0c3a3/dblp}, booktitle = {CSAI/ICIMT}, crossref = {conf/csai/2018}, ee = {https://doi.org/10.1145/3297156.3297160}, interhash = {16a2a3563f50b26dd78d88189e29a488}, intrahash = {aba6feeadae50fae1b567c82eca0c3a3}, isbn = {978-1-4503-6606-9}, keywords = {dblp}, pages = {571-575}, publisher = {ACM}, timestamp = {2019-04-13T11:50:57.000+0200}, title = {Application of Deep Learning in Analog Circuit Sizing.}, url = {http://dblp.uni-trier.de/db/conf/csai/csai2018.html#WangLG18}, year = 2018 }