%0 Conference Paper %1 conf/vdat/ChatterjeeMC16 %A Chatterjee, Navonil %A Mukherjee, Priyajit %A Chattopadhyay, Santanu %B VDAT %D 2016 %I IEEE %K dblp %P 1-2 %T A strategy for fault tolerant reconfigurable Network-on-Chip design. %U http://dblp.uni-trier.de/db/conf/vdat/vdat2016.html#ChatterjeeMC16 %@ 978-1-5090-1422-4

@inproceedings{conf/vdat/ChatterjeeMC16, added-at = {2018-11-02T00:00:00.000+0100}, author = {Chatterjee, Navonil and Mukherjee, Priyajit and Chattopadhyay, Santanu}, biburl = {https://www.bibsonomy.org/bibtex/24778bd9d0b245a3bf1ffac16fb0baac8/dblp}, booktitle = {VDAT}, crossref = {conf/vdat/2016}, ee = {https://doi.org/10.1109/ISVDAT.2016.8064893}, interhash = {24fcf2d672e574669c4fd42e7ad5d89f}, intrahash = {4778bd9d0b245a3bf1ffac16fb0baac8}, isbn = {978-1-5090-1422-4}, keywords = {dblp}, pages = {1-2}, publisher = {IEEE}, timestamp = {2018-11-03T13:48:18.000+0100}, title = {A strategy for fault tolerant reconfigurable Network-on-Chip design.}, url = {http://dblp.uni-trier.de/db/conf/vdat/vdat2016.html#ChatterjeeMC16}, year = 2016 }