%0 Conference Paper %1 conf/vlsid/CamposanoSC00 %A Camposano, Raul %A Savage, Warren %A Chilton, John %B VLSI Design %D 2000 %I IEEE Computer Society %K dblp %P 20- %T IP Reuse in System on a Chip Design. %U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2000.html#CamposanoSC00 %@ 0-7695-0487-6

@inproceedings{conf/vlsid/CamposanoSC00, added-at = {2023-03-24T00:00:00.000+0100}, author = {Camposano, Raul and Savage, Warren and Chilton, John}, biburl = {https://www.bibsonomy.org/bibtex/21c23e26dfef0bafcb186980a8424a84f/dblp}, booktitle = {VLSI Design}, crossref = {conf/vlsid/2000}, ee = {https://doi.ieeecomputersociety.org/10.1109/VLSID.2000.10016}, interhash = {29cd7909ea4c612ec41b20d0e89c77ed}, intrahash = {1c23e26dfef0bafcb186980a8424a84f}, isbn = {0-7695-0487-6}, keywords = {dblp}, pages = {20-}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T04:19:01.000+0200}, title = {IP Reuse in System on a Chip Design.}, url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2000.html#CamposanoSC00}, year = 2000 }