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- BibTeX key
- conf/vlsid/UsamiSHMTNSANIKN09
- entry type
- inproceedings
- booktitle
- VLSI Design
- year
- 2009
- pages
- 381-386
- publisher
- IEEE Computer Society
- crossref
- conf/vlsid/2009
- ee
- https://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2009.63
- isbn
- 978-0-7695-3506-7
- url
- http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#UsamiSHMTNSANIKN09
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- please select -%0 Conference Paper
%1 conf/vlsid/UsamiSHMTNSANIKN09
%A Usami, Kimiyoshi
%A Shirai, Toshiaki
%A Hashida, Tatsunori
%A Masuda, Hiroki
%A Takeda, Seidai
%A Nakata, Mitsutaka
%A Seki, Naomi
%A Amano, Hideharu
%A Namiki, Mitaro
%A Imai, Masashi
%A Kondo, Masaaki
%A Nakamura, Hiroshi
%B VLSI Design
%D 2009
%I IEEE Computer Society
%K dblp
%P 381-386
%T Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression.
%U http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#UsamiSHMTNSANIKN09
%@ 978-0-7695-3506-7
@inproceedings{conf/vlsid/UsamiSHMTNSANIKN09,
added-at = {2024-03-22T00:00:00.000+0100},
author = {Usami, Kimiyoshi and Shirai, Toshiaki and Hashida, Tatsunori and Masuda, Hiroki and Takeda, Seidai and Nakata, Mitsutaka and Seki, Naomi and Amano, Hideharu and Namiki, Mitaro and Imai, Masashi and Kondo, Masaaki and Nakamura, Hiroshi},
biburl = {https://www.bibsonomy.org/bibtex/276c4d9e4a8dcb17261479de7fc6fdd1b/dblp},
booktitle = {VLSI Design},
crossref = {conf/vlsid/2009},
ee = {https://doi.ieeecomputersociety.org/10.1109/VLSI.Design.2009.63},
interhash = {2ca6b778551d1163d1f5cfeec1c2082a},
intrahash = {76c4d9e4a8dcb17261479de7fc6fdd1b},
isbn = {978-0-7695-3506-7},
keywords = {dblp},
pages = {381-386},
publisher = {IEEE Computer Society},
timestamp = {2024-04-10T04:19:34.000+0200},
title = {Design and Implementation of Fine-Grain Power Gating with Ground Bounce Suppression.},
url = {http://dblp.uni-trier.de/db/conf/vlsid/vlsid2009.html#UsamiSHMTNSANIKN09},
year = 2009
}