%0 Journal Article %1 journals/vlsi/GothandaramanPWHH10 %A Gothandaraman, Akila %A Peterson, Gregory D. %A Warren, G. Lee %A Hinde, Robert J. %A Harrison, Robert J. %D 2010 %J VLSI Design %K dblp %P 946486:1-946486:8 %T A Pipelined and Parallel Architecture for Quantum Monte Carlo Simulations on FPGAs. %U http://dblp.uni-trier.de/db/journals/vlsi/vlsi2010.html#GothandaramanPWHH10 %V 2010

@article{journals/vlsi/GothandaramanPWHH10, added-at = {2018-11-24T00:00:00.000+0100}, author = {Gothandaraman, Akila and Peterson, Gregory D. and Warren, G. Lee and Hinde, Robert J. and Harrison, Robert J.}, biburl = {https://www.bibsonomy.org/bibtex/22fc794c767024e9d2780de9a7aef94e5/dblp}, ee = {https://www.wikidata.org/entity/Q58653705}, interhash = {2d2a6a31725c8f0600b499237ce9e8b5}, intrahash = {2fc794c767024e9d2780de9a7aef94e5}, journal = {VLSI Design}, keywords = {dblp}, pages = {946486:1-946486:8}, timestamp = {2018-11-27T11:39:44.000+0100}, title = {A Pipelined and Parallel Architecture for Quantum Monte Carlo Simulations on FPGAs.}, url = {http://dblp.uni-trier.de/db/journals/vlsi/vlsi2010.html#GothandaramanPWHH10}, volume = 2010, year = 2010 }