%0 Journal Article %1 journals/ieiceee/TianHLDSY17a %A Tian, Yinghui %A Hei, Yong %A Liu, Zhizhe %A Di, Zhixiong %A Shen, Qi %A Yu, Zenghui %D 2017 %J IEICE Electron. Express %K dblp %N 22 %P 20178005 %T Erratum: A memory-based FFT processor using modified signal flow graph with novel conflict-free address schemes IEICE Electronics Express Vol. 14 (2017) No. 15 pp. 20170660. %U http://dblp.uni-trier.de/db/journals/ieiceee/ieiceee14.html#TianHLDSY17a %V 14

@article{journals/ieiceee/TianHLDSY17a, added-at = {2021-02-12T00:00:00.000+0100}, author = {Tian, Yinghui and Hei, Yong and Liu, Zhizhe and Di, Zhixiong and Shen, Qi and Yu, Zenghui}, biburl = {https://www.bibsonomy.org/bibtex/2ea9c8e169e7392daaa85210dcf6cfc84/dblp}, ee = {https://doi.org/10.1587/elex.14.20178005}, interhash = {32d032cd9e0640eacc9292be9d0afaf4}, intrahash = {ea9c8e169e7392daaa85210dcf6cfc84}, journal = {IEICE Electron. Express}, keywords = {dblp}, number = 22, pages = 20178005, timestamp = {2024-04-09T06:50:05.000+0200}, title = {Erratum: A memory-based FFT processor using modified signal flow graph with novel conflict-free address schemes [IEICE Electronics Express Vol. 14 (2017) No. 15 pp. 20170660].}, url = {http://dblp.uni-trier.de/db/journals/ieiceee/ieiceee14.html#TianHLDSY17a}, volume = 14, year = 2017 }