%0 Journal Article %1 journals/tcad/TangXLZD18 %A Tang, Xiaofeng %A Xu, Aiqiang %A Li, Ruifeng %A Zhu, Min %A Dai, Jinling %D 2018 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 7 %P 1483-1493 %T Simulation-Based Diagnostic Model for Automatic Testability Analysis of Analog Circuits. %U http://dblp.uni-trier.de/db/journals/tcad/tcad37.html#TangXLZD18 %V 37

@article{journals/tcad/TangXLZD18, added-at = {2020-09-24T00:00:00.000+0200}, author = {Tang, Xiaofeng and Xu, Aiqiang and Li, Ruifeng and Zhu, Min and Dai, Jinling}, biburl = {https://www.bibsonomy.org/bibtex/2291f40b01228bebd607f99ed9454cd46/dblp}, ee = {https://doi.org/10.1109/TCAD.2017.2762647}, interhash = {493d25c74a0aae7766994cc7f010f549}, intrahash = {291f40b01228bebd607f99ed9454cd46}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 7, pages = {1483-1493}, timestamp = {2020-09-25T11:46:16.000+0200}, title = {Simulation-Based Diagnostic Model for Automatic Testability Analysis of Analog Circuits.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad37.html#TangXLZD18}, volume = 37, year = 2018 }