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From Operational Semantics to Denotational Semantics for Verilog

, , and .
(2001)
DOI: http://dx.doi.org/10.1007/3-540-44798-9\_34

Abstract

This paper presents the derivation of a denotational semantics from an operational semantics for a subset of the widely used hardware description language Verilog. Our aim is to build an equivalence between the operational and denotational semantics. We propose a discrete time semantic model for Verilog. Algebraic laws are also investigated in this paper, with the ultimate aim of providing a unified set of semantic views for Verilog.

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