%0 Journal Article %1 journals/jssc/HaldiCRLN08 %A Haldi, Peter %A Chowdhury, Debopriyo %A Reynaert, Patrick %A Liu, Gang %A Niknejad, Ali M. %D 2008 %J IEEE J. Solid State Circuits %K dblp %N 5 %P 1054-1063 %T A 5.8 GHz 1 V Linear Power Amplifier Using a Novel On-Chip Transformer Power Combiner in Standard 90 nm CMOS. %U http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#HaldiCRLN08 %V 43

@article{journals/jssc/HaldiCRLN08, added-at = {2020-08-30T00:00:00.000+0200}, author = {Haldi, Peter and Chowdhury, Debopriyo and Reynaert, Patrick and Liu, Gang and Niknejad, Ali M.}, biburl = {https://www.bibsonomy.org/bibtex/291c4ed9ac6230a790dfd97122c404e4e/dblp}, ee = {https://doi.org/10.1109/JSSC.2008.920347}, interhash = {b73d63afe0cf218b33d519f0177efad5}, intrahash = {91c4ed9ac6230a790dfd97122c404e4e}, journal = {IEEE J. Solid State Circuits}, keywords = {dblp}, number = 5, pages = {1054-1063}, timestamp = {2020-08-31T11:41:04.000+0200}, title = {A 5.8 GHz 1 V Linear Power Amplifier Using a Novel On-Chip Transformer Power Combiner in Standard 90 nm CMOS.}, url = {http://dblp.uni-trier.de/db/journals/jssc/jssc43.html#HaldiCRLN08}, volume = 43, year = 2008 }