%0 Conference Paper %1 conf/smacd/ZwergerSG16 %A Zwerger, Michael %A Shrivastava, Gaurav %A Graeb, Helmut %B SMACD %D 2016 %I IEEE %K dblp %P 1-4 %T Power-down synthesis for analog circuits including switch sizing. %U http://dblp.uni-trier.de/db/conf/smacd/smacd2016.html#ZwergerSG16 %@ 978-1-5090-0490-4

@inproceedings{conf/smacd/ZwergerSG16, added-at = {2018-08-30T00:00:00.000+0200}, author = {Zwerger, Michael and Shrivastava, Gaurav and Graeb, Helmut}, biburl = {https://www.bibsonomy.org/bibtex/2e0124558aa4f982d7642052feb974073/dblp}, booktitle = {SMACD}, crossref = {conf/smacd/2016}, ee = {https://doi.org/10.1109/SMACD.2016.7520645}, interhash = {c93a0a4b25e37b446b3332d6a54b89f4}, intrahash = {e0124558aa4f982d7642052feb974073}, isbn = {978-1-5090-0490-4}, keywords = {dblp}, pages = {1-4}, publisher = {IEEE}, timestamp = {2019-10-17T22:17:49.000+0200}, title = {Power-down synthesis for analog circuits including switch sizing.}, url = {http://dblp.uni-trier.de/db/conf/smacd/smacd2016.html#ZwergerSG16}, year = 2016 }