%0 Journal Article %1 journals/corr/abs-2308-01672 %A Chen, Shixin %A Li, Shanyi %A Zhuang, Zhen %A Zheng, Su %A Liang, Zheng %A Ho, Tsung-Yi %A Yu, Bei %A Sangiovanni-Vincentelli, Alberto L. %D 2023 %J CoRR %K dblp %T Floorplet: Performance-aware Floorplan Framework for Chiplet Integration. %U http://dblp.uni-trier.de/db/journals/corr/corr2308.html#abs-2308-01672 %V abs/2308.01672

@article{journals/corr/abs-2308-01672, added-at = {2024-08-05T00:00:00.000+0200}, author = {Chen, Shixin and Li, Shanyi and Zhuang, Zhen and Zheng, Su and Liang, Zheng and Ho, Tsung-Yi and Yu, Bei and Sangiovanni-Vincentelli, Alberto L.}, biburl = {https://www.bibsonomy.org/bibtex/27df2f7f56d5e3aec934cfebd32662c63/dblp}, ee = {https://doi.org/10.48550/arXiv.2308.01672}, interhash = {ca6f09dd937a302b695bd5538c35f735}, intrahash = {7df2f7f56d5e3aec934cfebd32662c63}, journal = {CoRR}, keywords = {dblp}, timestamp = {2024-08-12T07:07:17.000+0200}, title = {Floorplet: Performance-aware Floorplan Framework for Chiplet Integration.}, url = {http://dblp.uni-trier.de/db/journals/corr/corr2308.html#abs-2308-01672}, volume = {abs/2308.01672}, year = 2023 }