%0 Journal Article %1 journals/tcas/YooP17 %A Yoo, Injae %A Park, In-Cheol %D 2017 %J IEEE Trans. Circuits Syst. II Express Briefs %K dblp %N 9 %P 1057-1061 %T Low-Power LDPC-CC Decoding Architecture Based on the Integration of Memory Banks. %U http://dblp.uni-trier.de/db/journals/tcas/tcasII64.html#YooP17 %V 64-II

@article{journals/tcas/YooP17, added-at = {2020-05-27T00:00:00.000+0200}, author = {Yoo, Injae and Park, In-Cheol}, biburl = {https://www.bibsonomy.org/bibtex/274d0fae161a9da4ab3ded3257a52cd0e/dblp}, ee = {https://doi.org/10.1109/TCSII.2016.2638472}, interhash = {d29918822e8574800421b2f73c953048}, intrahash = {74d0fae161a9da4ab3ded3257a52cd0e}, journal = {IEEE Trans. Circuits Syst. II Express Briefs}, keywords = {dblp}, number = 9, pages = {1057-1061}, timestamp = {2020-05-28T11:54:50.000+0200}, title = {Low-Power LDPC-CC Decoding Architecture Based on the Integration of Memory Banks.}, url = {http://dblp.uni-trier.de/db/journals/tcas/tcasII64.html#YooP17}, volume = {64-II}, year = 2017 }