%0 Conference Paper %1 conf/dac/JiangB02 %A Jiang, Yunjian %A Brayton, Robert K. %B DAC %D 2002 %I ACM %K dblp %P 319-324 %T Software synthesis from synchronous specifications using logic simulation techniques. %U http://dblp.uni-trier.de/db/conf/dac/dac2002.html#JiangB02 %@ 1-58113-461-4

@inproceedings{conf/dac/JiangB02, added-at = {2018-11-06T00:00:00.000+0100}, author = {Jiang, Yunjian and Brayton, Robert K.}, biburl = {https://www.bibsonomy.org/bibtex/295cbbcf349ebcb7879cfa117c5768f70/dblp}, booktitle = {DAC}, crossref = {conf/dac/2002}, ee = {https://doi.org/10.1145/513918.514002}, interhash = {d5b2acbad2c980fedcc629fb37d18524}, intrahash = {95cbbcf349ebcb7879cfa117c5768f70}, isbn = {1-58113-461-4}, keywords = {dblp}, pages = {319-324}, publisher = {ACM}, timestamp = {2018-11-07T15:13:19.000+0100}, title = {Software synthesis from synchronous specifications using logic simulation techniques.}, url = {http://dblp.uni-trier.de/db/conf/dac/dac2002.html#JiangB02}, year = 2002 }