%0 Conference Paper %1 conf/iscas/ImR03 %A Im, Yonghee %A Roy, Kaushik %B ISCAS (5) %D 2003 %I IEEE %K dblp %P 637-640 %T A logic-aware layout methodology to enhance the noise immunity of domino circuits. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2003-5.html#ImR03 %@ 0-7803-7761-3

@inproceedings{conf/iscas/ImR03, added-at = {2016-05-20T00:00:00.000+0200}, author = {Im, Yonghee and Roy, Kaushik}, biburl = {https://www.bibsonomy.org/bibtex/24170f1cb742610f8e4d4c9bb696ec012/dblp}, booktitle = {ISCAS (5)}, crossref = {conf/iscas/2003}, ee = {http://dx.doi.org/10.1109/ISCAS.2003.1206393}, interhash = {e2528372215bc6af6c45236086f07637}, intrahash = {4170f1cb742610f8e4d4c9bb696ec012}, isbn = {0-7803-7761-3}, keywords = {dblp}, pages = {637-640}, publisher = {IEEE}, timestamp = {2016-07-28T11:40:52.000+0200}, title = {A logic-aware layout methodology to enhance the noise immunity of domino circuits.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2003-5.html#ImR03}, year = 2003 }