%0 Conference Paper %1 conf/iscas/AliotoP03 %A Alioto, Massimo %A Palumbo, Gaetano %B ISCAS (5) %D 2003 %I IEEE %K dblp %P 261-264 %T Design of MUX, XOR and D-latch SCL gates. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2003-5.html#AliotoP03 %@ 0-7803-7761-3

@inproceedings{conf/iscas/AliotoP03, added-at = {2016-05-20T00:00:00.000+0200}, author = {Alioto, Massimo and Palumbo, Gaetano}, biburl = {https://www.bibsonomy.org/bibtex/24bafaa541734f4ca1ca2d84f16c110b4/dblp}, booktitle = {ISCAS (5)}, crossref = {conf/iscas/2003}, ee = {http://dx.doi.org/10.1109/ISCAS.2003.1206248}, interhash = {f0f620c01c58e04efbc1d166214033e2}, intrahash = {4bafaa541734f4ca1ca2d84f16c110b4}, isbn = {0-7803-7761-3}, keywords = {dblp}, pages = {261-264}, publisher = {IEEE}, timestamp = {2016-05-21T11:45:42.000+0200}, title = {Design of MUX, XOR and D-latch SCL gates.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2003-5.html#AliotoP03}, year = 2003 }