%0 Journal Article %1 journals/tvlsi/SastryRB93 %A Sastry, Raghu %A Ranganathan, N. %A Bunke, Horst %D 1993 %J IEEE Trans. Very Large Scale Integr. Syst. %K dblp %N 4 %P 398-407 %T VLSI architectures for polygon recognition. %U http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi1.html#SastryRB93 %V 1

@article{journals/tvlsi/SastryRB93, added-at = {2020-03-11T00:00:00.000+0100}, author = {Sastry, Raghu and Ranganathan, N. and Bunke, Horst}, biburl = {https://www.bibsonomy.org/bibtex/20185285ebde8095d3a5bdf8c3c34e5ad/dblp}, ee = {https://doi.org/10.1109/92.250186}, interhash = {6982367e088d3758565c0a77cd9786af}, intrahash = {0185285ebde8095d3a5bdf8c3c34e5ad}, journal = {IEEE Trans. Very Large Scale Integr. Syst.}, keywords = {dblp}, number = 4, pages = {398-407}, timestamp = {2020-03-12T11:45:46.000+0100}, title = {VLSI architectures for polygon recognition.}, url = {http://dblp.uni-trier.de/db/journals/tvlsi/tvlsi1.html#SastryRB93}, volume = 1, year = 1993 }