Аннотация

This paper presents a new approach to technology mapping for arbitrary technologies with single output cells. It overcomes the restrictions of tree-mapping based methods. Optimal algorithms for special cases of DAG-mapping are presented: for minimum delay mapping and for duplication-free mapping under a class of simple cost functions (including area and delay). Heuristics for the general case and for computing AT-tradeoffs are developed and applied to LUT-based FPGAs.

Линки и ресурсы

тэги