%0 Generic %1 shailasmath2013design %A Shaila S Math, Veerabhadrayya Math %B 2013 Mobile Communication - I %D 2013 %E Kaushik, Dr. B K %I ACEEE (A Computer division of IDES) %K AMBA AXI IP Xilinx %T Design and Analysis of Xilinx Verified AMBA Bridge for SoC Systems %U http://searchdl.org/public/book_series/LSCS/2/535.pdf %X ARM introduced the Advanced Microcontroller Bus Architecture (AMBA) 4.0 and its specifications define five buses/interfaces: Advanced eXtensible Interface Bus (AXI), Advanced High-performance Bus (AHB), Advanced System Bus (ASB), Advanced Peripheral Bus (APB) and Advanced Trace Bus (ATB). That means more and more existing Intellectual Property (IP) must be able to communicate with AMBA4.0 bus. This paper presents an IP core design of APB Bridge, to provide interface between AXI-Lite bus and APB bus operating at different frequencies. The maximum operating frequency of the module is 168.464MHz. Test cases are run to perform multiple read and write operations. Synthesis and Simulation is done using Xilinx ISE and Modelsim.

@conference{shailasmath2013design, abstract = {ARM introduced the Advanced Microcontroller Bus Architecture (AMBA) 4.0 and its specifications define five buses/interfaces: Advanced eXtensible Interface Bus (AXI), Advanced High-performance Bus (AHB), Advanced System Bus (ASB), Advanced Peripheral Bus (APB) and Advanced Trace Bus (ATB). That means more and more existing Intellectual Property (IP) must be able to communicate with AMBA4.0 bus. This paper presents an IP core design of APB Bridge, to provide interface between AXI-Lite bus and APB bus operating at different frequencies. The maximum operating frequency of the module is 168.464MHz. Test cases are run to perform multiple read and write operations. Synthesis and Simulation is done using Xilinx ISE and Modelsim.}, added-at = {2014-02-05T07:50:00.000+0100}, author = {Shaila S Math, Veerabhadrayya Math}, biburl = {https://www.bibsonomy.org/bibtex/2486abec5eb2676588c2f8de03680db7b/idescitation}, booktitle = {2013 Mobile Communication - I}, editor = {Kaushik, Dr. B K}, interhash = {c0fb9e2c16b95c410da3ede118ff97af}, intrahash = {486abec5eb2676588c2f8de03680db7b}, keywords = {AMBA AXI IP Xilinx}, organization = {Institute of Doctors Engineers and Scientists}, publisher = {ACEEE (A Computer division of IDES)}, timestamp = {2014-02-05T07:50:00.000+0100}, title = {Design and Analysis of Xilinx Verified AMBA Bridge for SoC Systems}, url = {http://searchdl.org/public/book_series/LSCS/2/535.pdf}, year = 2013 }