Design of Efficient 4×4 Quaternary Vedic Multiplier Using Current-Mode Multi-Valued Logic
Int. J. on Recent Trends in Engineering and Technology,, 10 (2):
11 (Januar 2014)Zusammenfassung
Vedic multiplier is based on ancient Indian Vedic mathematics that offers
simpler and hierarchical structure. Multi-valued logic results in the effective utilization of
interconnections, which reduces the chip size and delay. This paper proposes a new design
of 4×4 Vedic multiplier using quaternary current-mode multi-valued logic, equivalent to
iplier has
very low transistor-count and consumes very low power as compared to other multiplier
designs. Since the performance of a digital signal processor depends mainly on the
multipliers used, the proposed approach can greatly enhance the performance of a digital
signal processing system.