Evolutionary design of circuits (EDC), an important
branch of evolvable hardware which emphasises circuit
design, is a promising way to realize automated design
of electronic circuits. In order to improve
evolutionary design of logic circuits in efficiency,
scalability and capability of optimisation, a genetic
algorithm based novel approach was developed. It
employs a gate-level encoding scheme that allows
flexible changes of functions and interconnections of
logic cells comprised, and it adopts a multi-objective
evaluation mechanism of fitness with weight-vector
adaptation and circuit simulation. Besides, it features
an adaptation strategy that enables crossover
probability and mutation probability to vary with
individuals' diversity and genetic-search process. It
was validated by the experiments on arithmetic circuits
especially digital multipliers, from which a few
functionally correct circuits with novel structures,
less gate count and higher operating speed were
obtained. Some of the evolved circuits are the most
efficient or largest ones (in terms of gate count or
problem scale) as far as we know. Moreover, some novel
and general principles have been discerned from the EDC
results, which are easy to verify but difficult to dig
out by human experts with existing knowledge. These
results argue that the approach is promising and worthy
of further research.
%0 Journal Article
%1 Zhao:2006:GPEM
%A Zhao, Shuguang
%A Jiao, Licheng
%D 2006
%J Genetic Programming and Evolvable Machines
%K Adaptive Evolutionary Knowledge Multi-objective algorithm, algorithms, circuits, design discovery evolvable genetic hardware, of
%N 3
%P 195--210
%R doi:10.1007/s10710-006-9005-7
%T Multi-objective evolutionary design and knowledge
discovery of logic circuits based on an adaptive
genetic algorithm
%V 7
%X Evolutionary design of circuits (EDC), an important
branch of evolvable hardware which emphasises circuit
design, is a promising way to realize automated design
of electronic circuits. In order to improve
evolutionary design of logic circuits in efficiency,
scalability and capability of optimisation, a genetic
algorithm based novel approach was developed. It
employs a gate-level encoding scheme that allows
flexible changes of functions and interconnections of
logic cells comprised, and it adopts a multi-objective
evaluation mechanism of fitness with weight-vector
adaptation and circuit simulation. Besides, it features
an adaptation strategy that enables crossover
probability and mutation probability to vary with
individuals' diversity and genetic-search process. It
was validated by the experiments on arithmetic circuits
especially digital multipliers, from which a few
functionally correct circuits with novel structures,
less gate count and higher operating speed were
obtained. Some of the evolved circuits are the most
efficient or largest ones (in terms of gate count or
problem scale) as far as we know. Moreover, some novel
and general principles have been discerned from the EDC
results, which are easy to verify but difficult to dig
out by human experts with existing knowledge. These
results argue that the approach is promising and worthy
of further research.
@article{Zhao:2006:GPEM,
abstract = {Evolutionary design of circuits (EDC), an important
branch of evolvable hardware which emphasises circuit
design, is a promising way to realize automated design
of electronic circuits. In order to improve
evolutionary design of logic circuits in efficiency,
scalability and capability of optimisation, a genetic
algorithm based novel approach was developed. It
employs a gate-level encoding scheme that allows
flexible changes of functions and interconnections of
logic cells comprised, and it adopts a multi-objective
evaluation mechanism of fitness with weight-vector
adaptation and circuit simulation. Besides, it features
an adaptation strategy that enables crossover
probability and mutation probability to vary with
individuals' diversity and genetic-search process. It
was validated by the experiments on arithmetic circuits
especially digital multipliers, from which a few
functionally correct circuits with novel structures,
less gate count and higher operating speed were
obtained. Some of the evolved circuits are the most
efficient or largest ones (in terms of gate count or
problem scale) as far as we know. Moreover, some novel
and general principles have been discerned from the EDC
results, which are easy to verify but difficult to dig
out by human experts with existing knowledge. These
results argue that the approach is promising and worthy
of further research.},
added-at = {2008-06-19T17:46:40.000+0200},
author = {Zhao, Shuguang and Jiao, Licheng},
biburl = {https://www.bibsonomy.org/bibtex/2ec68ec7db4d6594c6b5fa87f39e70db5/brazovayeye},
doi = {doi:10.1007/s10710-006-9005-7},
interhash = {5b97cd4fd59d3331fb76bafe88efc504},
intrahash = {ec68ec7db4d6594c6b5fa87f39e70db5},
issn = {1389-2576},
journal = {Genetic Programming and Evolvable Machines},
keywords = {Adaptive Evolutionary Knowledge Multi-objective algorithm, algorithms, circuits, design discovery evolvable genetic hardware, of},
month = {October},
number = 3,
pages = {195--210},
timestamp = {2008-06-19T17:55:51.000+0200},
title = {Multi-objective evolutionary design and knowledge
discovery of logic circuits based on an adaptive
genetic algorithm},
volume = 7,
year = 2006
}