%0 Conference Paper %1 conf/fpl/AbdelfattahHBDO18 %A Abdelfattah, Mohamed S. %A Han, David %A Bitar, Andrew %A DiCecco, Roberto %A O'Connell, Shane %A Shanker, Nitika %A Chu, Joseph %A Prins, Ian %A Fender, Joshua %A Ling, Andrew C. %A Chiu, Gordon R. %B FPL %D 2018 %I IEEE Computer Society %K dblp %P 411-418 %T DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration. %U http://dblp.uni-trier.de/db/conf/fpl/fpl2018.html#AbdelfattahHBDO18 %@ 978-1-5386-8517-4

@inproceedings{conf/fpl/AbdelfattahHBDO18, added-at = {2023-03-24T00:00:00.000+0100}, author = {Abdelfattah, Mohamed S. and Han, David and Bitar, Andrew and DiCecco, Roberto and O'Connell, Shane and Shanker, Nitika and Chu, Joseph and Prins, Ian and Fender, Joshua and Ling, Andrew C. and Chiu, Gordon R.}, biburl = {https://www.bibsonomy.org/bibtex/2f5bd14814d54747f14b9ab38b3678bcf/dblp}, booktitle = {FPL}, crossref = {conf/fpl/2018}, ee = {https://doi.ieeecomputersociety.org/10.1109/FPL.2018.00077}, interhash = {393efa1a6eb9ef9afa5a521225e55db6}, intrahash = {f5bd14814d54747f14b9ab38b3678bcf}, isbn = {978-1-5386-8517-4}, keywords = {dblp}, pages = {411-418}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T14:51:47.000+0200}, title = {DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration.}, url = {http://dblp.uni-trier.de/db/conf/fpl/fpl2018.html#AbdelfattahHBDO18}, year = 2018 }