%0 Conference Paper %1 conf/date/FerrerGFAC04 %A Ferrer, Daniel %A González, Ramiro %A Fleitas, Roberto %A Acle, Julio Pérez %A Canetti, Rafael M. %B DATE %D 2004 %I IEEE Computer Society %K dblp %P 218-223 %T NeuroFPGA - Implementing Artificial Neural Networks on Programmable Logic Devices. %U http://dblp.uni-trier.de/db/conf/date/date2004-df.html#FerrerGFAC04 %@ 0-7695-2085-5

@inproceedings{conf/date/FerrerGFAC04, added-at = {2023-03-24T00:00:00.000+0100}, author = {Ferrer, Daniel and González, Ramiro and Fleitas, Roberto and Acle, Julio Pérez and Canetti, Rafael M.}, biburl = {https://www.bibsonomy.org/bibtex/2c42702a2e9b7c61455de93c335652387/dblp}, booktitle = {DATE}, crossref = {conf/date/2004}, ee = {http://dl.acm.org/citation.cfm?id=969246}, interhash = {4c2632f06f91138da486da5ef25fb430}, intrahash = {c42702a2e9b7c61455de93c335652387}, isbn = {0-7695-2085-5}, keywords = {dblp}, pages = {218-223}, publisher = {IEEE Computer Society}, timestamp = {2024-04-10T06:51:35.000+0200}, title = {NeuroFPGA - Implementing Artificial Neural Networks on Programmable Logic Devices.}, url = {http://dblp.uni-trier.de/db/conf/date/date2004-df.html#FerrerGFAC04}, year = 2004 }