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%0 Conference Paper
%1 conf/iccd/HanawaNNSYHSN91
%A Hanawa, M.
%A Nishimukai, Tadahiko
%A Nishii, O.
%A Suzuki, Masato
%A Yano, K.
%A Hiraki, M.
%A Shukuri, S.
%A Nishida, T.
%B ICCD
%D 1991
%I IEEE Computer Society
%K dblp
%P 128-131
%T On-Chip Multiple Superscalar Processors with Secondary Cache Memories.
%U http://dblp.uni-trier.de/db/conf/iccd/iccd1991.html#HanawaNNSYHSN91
%@ 0-8186-2270-9
@inproceedings{conf/iccd/HanawaNNSYHSN91,
added-at = {2023-03-23T00:00:00.000+0100},
author = {Hanawa, M. and Nishimukai, Tadahiko and Nishii, O. and Suzuki, Masato and Yano, K. and Hiraki, M. and Shukuri, S. and Nishida, T.},
biburl = {https://www.bibsonomy.org/bibtex/2452f2a78c382c73f527ff760cbfcc703/dblp},
booktitle = {ICCD},
crossref = {conf/iccd/1991},
ee = {https://doi.ieeecomputersociety.org/10.1109/ICCD.1991.139862},
interhash = {8caff4c1a4f90ffa18f14c518b8ca893},
intrahash = {452f2a78c382c73f527ff760cbfcc703},
isbn = {0-8186-2270-9},
keywords = {dblp},
pages = {128-131},
publisher = {IEEE Computer Society},
timestamp = {2024-04-10T21:59:25.000+0200},
title = {On-Chip Multiple Superscalar Processors with Secondary Cache Memories.},
url = {http://dblp.uni-trier.de/db/conf/iccd/iccd1991.html#HanawaNNSYHSN91},
year = 1991
}