%0 Conference Paper %1 conf/micro/XieLLWSWF15 %A Xie, Xiaolong %A Liang, Yun %A Li, Xiuhong %A Wu, Yudong %A Sun, Guangyu %A Wang, Tao %A Fan, Dongrui %B MICRO %D 2015 %E Prvulovic, Milos %I ACM %K dblp %P 395-406 %T Enabling coordinated register allocation and thread-level parallelism optimization for GPUs. %U http://dblp.uni-trier.de/db/conf/micro/micro2015.html#XieLLWSWF15 %@ 978-1-4503-4034-2

@inproceedings{conf/micro/XieLLWSWF15, added-at = {2023-06-26T00:00:00.000+0200}, author = {Xie, Xiaolong and Liang, Yun and Li, Xiuhong and Wu, Yudong and Sun, Guangyu and Wang, Tao and Fan, Dongrui}, biburl = {https://www.bibsonomy.org/bibtex/2782010f934ee8ac4c8297619fcb66559/dblp}, booktitle = {MICRO}, crossref = {conf/micro/2015}, editor = {Prvulovic, Milos}, ee = {https://ieeexplore.ieee.org/document/7856614/}, interhash = {be69d39a6f8de65e165f6d6a3479b7e5}, intrahash = {782010f934ee8ac4c8297619fcb66559}, isbn = {978-1-4503-4034-2}, keywords = {dblp}, pages = {395-406}, publisher = {ACM}, timestamp = {2024-04-09T12:46:05.000+0200}, title = {Enabling coordinated register allocation and thread-level parallelism optimization for GPUs.}, url = {http://dblp.uni-trier.de/db/conf/micro/micro2015.html#XieLLWSWF15}, year = 2015 }