%0 Journal Article %1 noauthororeditor %A Kumar, Aman %A Singh, Gurinder Pal %D 2017 %E Kumar, Dr. Shiv %J International Journal of Inventive Engineering and Sciences (IJIES) %K %N 5 %P 33-38 %T Low Power Current Mirror Topologies in 32nm Technology for VlSI Analog Circuit %U https://www.ijies.org/wp-content/uploads/papers/v4i5/E0739034517.pdf %V 4 %X This paper deals with the analog circuit constructed using a current mirror. Two stage op-amp circuits are made from current mirror and other elements like source amplifier. Here, we have constructed four types of current mirror named as Conventional CM, Cascode CM, Wilson CM, modified Wilson CM. The imperative constraints of current mirrors approaches are source voltage for small power, output resistance, overall power, constancy are related to each other. On studying these schemes, it is detected that modified Wilson current mirror current mirror system has increased the output resistance by 21MΩ to 37MΩ of the Wilson current mirror and decreased the power consumption by 23.10µW to 19.43µW.We have also constructed two-stage op-amps with help of conventional current mirror. In this paper an operational amplifier by CMOS is presented whose input depends on bias current which is 20uA and designed using 32nm technology. In sub-threshold region due to unique behavior of the MOSFET transistors not only allows a designer to work at low voltage and also at low input bias current. Scaling of MOSFET and keeping Vdd up to 0.8V-1.2V gain and phase margin of purposed op-amp has been obtained 78.6db and 68.8o respectively. These simulations are accomplished in 32nm CMOS technology using Galaxy cdesigner tool in Synopsis.

@article{noauthororeditor, abstract = { This paper deals with the analog circuit constructed using a current mirror. Two stage op-amp circuits are made from current mirror and other elements like source amplifier. Here, we have constructed four types of current mirror named as Conventional CM, Cascode CM, Wilson CM, modified Wilson CM. The imperative constraints of current mirrors approaches are source voltage for small power, output resistance, overall power, constancy are related to each other. On studying these schemes, it is detected that modified Wilson current mirror current mirror system has increased the output resistance by 21MΩ to 37MΩ of the Wilson current mirror and decreased the power consumption by 23.10µW to 19.43µW.We have also constructed two-stage op-amps with help of conventional current mirror. In this paper an operational amplifier by CMOS is presented whose input depends on bias current which is 20uA and designed using 32nm technology. In sub-threshold region due to unique behavior of the MOSFET transistors not only allows a designer to work at low voltage and also at low input bias current. Scaling of MOSFET and keeping Vdd up to 0.8V-1.2V gain and phase margin of purposed op-amp has been obtained 78.6db and 68.8o respectively. These simulations are accomplished in 32nm CMOS technology using Galaxy cdesigner tool in Synopsis.}, added-at = {2021-08-28T08:51:40.000+0200}, author = {Kumar, Aman and Singh, Gurinder Pal}, biburl = {https://www.bibsonomy.org/bibtex/234544ab6c2b6e35e7184076fbec7a1fc/ijies_beiesp}, editor = {Kumar, Dr. Shiv}, interhash = {e4253aee7fa4791a241919c6b0dab3b8}, intrahash = {34544ab6c2b6e35e7184076fbec7a1fc}, issn = {2319–9598}, journal = {International Journal of Inventive Engineering and Sciences (IJIES)}, keywords = {}, language = {En}, month = {March}, number = 5, pages = {33-38}, timestamp = {2021-08-28T08:51:40.000+0200}, title = {Low Power Current Mirror Topologies in 32nm Technology for VlSI Analog Circuit}, url = {https://www.ijies.org/wp-content/uploads/papers/v4i5/E0739034517.pdf}, volume = 4, year = 2017 }