%0 Journal Article %1 journals/tcad/OhP01 %A Oh, Jaewon %A Pedram, Massoud %D 2001 %J IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. %K dblp %N 6 %P 715-722 %T Gated clock routing for low-power microprocessor design. %U http://dblp.uni-trier.de/db/journals/tcad/tcad20.html#OhP01 %V 20

@article{journals/tcad/OhP01, added-at = {2020-09-24T00:00:00.000+0200}, author = {Oh, Jaewon and Pedram, Massoud}, biburl = {https://www.bibsonomy.org/bibtex/20ac05404d64ab4fe083b959dc3fa8f39/dblp}, ee = {https://doi.org/10.1109/43.924825}, interhash = {eda6c67e42f36b2723b891ea7870210d}, intrahash = {0ac05404d64ab4fe083b959dc3fa8f39}, journal = {IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.}, keywords = {dblp}, number = 6, pages = {715-722}, timestamp = {2020-09-25T11:44:38.000+0200}, title = {Gated clock routing for low-power microprocessor design.}, url = {http://dblp.uni-trier.de/db/journals/tcad/tcad20.html#OhP01}, volume = 20, year = 2001 }