%0 Conference Paper %1 conf/iscas/CousinSC00 %A Cousin, Jean-Gabriel %A Sentieys, Olivier %A Chillet, Daniel %B ISCAS %D 2000 %I IEEE %K dblp %P 621-624 %T Multi-algorithm ASIP synthesis and power estimation for DSP applications. %U http://dblp.uni-trier.de/db/conf/iscas/iscas2000.html#CousinSC00

@inproceedings{conf/iscas/CousinSC00, added-at = {2017-12-07T00:00:00.000+0100}, author = {Cousin, Jean-Gabriel and Sentieys, Olivier and Chillet, Daniel}, biburl = {https://www.bibsonomy.org/bibtex/2c35387d796e05fe2feda6be89a5ab91a/dblp}, booktitle = {ISCAS}, crossref = {conf/iscas/2000}, ee = {https://doi.org/10.1109/ISCAS.2000.856405}, interhash = {feb61cecc9fb0e38858b38d31a1ba709}, intrahash = {c35387d796e05fe2feda6be89a5ab91a}, keywords = {dblp}, pages = {621-624}, publisher = {IEEE}, timestamp = {2017-12-08T11:43:32.000+0100}, title = {Multi-algorithm ASIP synthesis and power estimation for DSP applications.}, url = {http://dblp.uni-trier.de/db/conf/iscas/iscas2000.html#CousinSC00}, year = 2000 }